P. Palmers

This paper presents a 10-bit 5-5 segmented current- steering digital-to-analog converter implemented in a standard 130-nm CMOS technology. Expand

This paper presents a 6-bit very high-speed, low-power digital-to-analog converter (DAC). Expand

This paper presents a 6-bit high-speed, low-power digital-to-analog converter (DAC). Expand

This paper presents MOJITO-R, a tool that performs variation-aware structural synthesis of analog circuits. Expand

This paper presents MOJITO, a system that performs structural synthesis of analog circuits, returning designs that are trustworthy by construction. Expand

Nyquist-rate digital-to-analog converters (DACs) can generate frequencies up to half the sampling frequency. Expand

This paper presents MOJITO, a system which optimizes across thousands of analog circuit topologies simultaneously, and returns a set of sized topologies that collectively provide a performance tradeoff. Expand

This paper presents a methodology for analog designers to maintain their insights into the relationship among performance specifications, topology choice, and sizing variables, despite those insights being constantly challenged by changing process nodes and new specs. Expand

This paper demonstrates a system that performs multi-objective sizing across 100,000 analog circuit topologies simultaneously, with SPICE accuracy. Expand

This paper presents a 1.2-2.6GHz 2×12 bit Direct Digital RF Modulator (DDRM) realized in 28nm CMOS. Expand