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We present results and discussions based on measurements in a campus underground powerline network in India. Most results on powerline channels presented in the literature thus far do not deal with the link between the distribution transformer and various sites served by it. This link is relevant to the use of power line as an access (last mile) medium for(More)
Integration of wind power with the grid has become an important problem. For integration, a producer needs to bid in a time-ahead market to deliver an amount of energy at a future point in time. Because wind speed and price are both uncertain, a producer needs to place bids on the basis of expected wind power yield and price. To this end, improving the(More)
This paper describes the design of an indirect current feedback Instrumentation Amplifier (IA). Transistor sizing plays a major role in achieving the desired gain, the Common Mode Rejection Ratio (CMRR) and the bandwidth of the Instrumentation Amplifier. A g<sub>m</sub>/I<sub>D</sub> based design methodology is employed to design the functional blocks of(More)
HVAC control strategies that exploit temporal variations in zone occupancy have been well studied. Occupancy can also vary spatially within a zone, especially during off-design operating conditions. We complement prior work by studying the usefulness of sensing occupancy information at different spatial resolutions in large zones served by multiple AHUs. As(More)
The present work presents the design of a Phase Locked Loop (PLL) synthesizer for suitable Frequency Modulated Continuous Wave (FMCW) radar applications. The PLL is designed with its loop dynamics selected to exhibit minimum capture transients, fast settling time and low phase noise. High linearity in frequency ramp over a wide operating frequency range(More)
Over 40% of the energy used in most cities is spent on heating or cooling buildings. Buildings do change dynamically in terms of their configuration, usage and performance. This calls for an online system which can monitor their performance in real time. A critical component of such a system is a well calibrated model of the facility that accurately(More)
—This paper deals with the study of the impact of power supply noise on the performance of CMOS Clock and Data Recovery (CDR) Circuits. The sensitivity of the various blocks of the dual loop CDR circuit to power supply noise is first studied and then it is demonstrated that insertion of suitable Low Dropout Regulators (LDOs) can enhance the performance of(More)
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