P. T. Patel

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This paper describes the use of a hierarchical design representation standard, CHDStd, as part of the architecture of the Chip Hierarchical Design System (CHDS). Details are given on CHDStd-based hierarchy mechanisms and processes required to support Forward Timing-Driven Hierarchical Design capabilities needed for chip design using 0.25u-0.18u technologies(More)
Cytoplasmic genic male sterility system based hybrids were synthesized by line × tester design and evaluated with check GTH 1 in RBD at Sardarkrushinagar, Jagudan and Khedbrahma during kharif 2007. Analysis of variance in individual and across environments revealed significant differences among genotypes and existence of overall heterosis for seed yield per(More)
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