P. M. Daniell

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J. C. Zarnecki, ’ M. Banaszkiewicz,5 M. Bannister2 W. V. Boynton6 P. Challenor7 B. Clark,’ P. M. Daniell, ’ J. Delderfield,2 M. A. English, ’ M. Fulchignoni,’ J. R. C. Garry, ’ J. E. Geake,3 S. F. Green, l B. Hathi, ’ S. Jaroslawski,’ M. R. Leese, ’ R. D. Lorenz, ‘3 6 J. A. M. McDonnell, ’ N. Merryweather-Clarke, 2 C. S. Mi1L3 R. J. Miller, l G. Newton,’ D.(More)
Summary form only given. A theoretical modification to the back error propagation (BEP) equations is presented which allows more efficient hardware implementation to be made when fabricating in analog VLSI. Through simulation results it is shown how this modification affects the performance of the BEP algorithm when performing simple learning tasks.<<ETX>>
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