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A fast power losses calculation method for long real time thermal simulation of IGBT module for a three-phase inverter system is presented in this paper. The speed-up is obtained by simplifying the representation of the three-phase inverter at the system modelling stage this allows a inverter system to be simulated predicting the effective voltages and(More)
Realising a higher voltage application utilising bridge topologies in CMOS Power IC CMOS technology presents integration and design issues that must be solved by careful selection of the manufacturing process architecture. In this paper, we present a solution that uses a p+/p-buffer/n-epi stack to implement a 100 V RESURF N-channel LDMOS high-side(More)
An elliptical, electroosmosis device, with many micro channel flow paths has been designed to circulate liquid to cool hot spots on a microprocessor chip. A pair of electrodes deposited 3 mm apart, across the channels, was employed to impose external electric potential. A preliminary experimental setup has been fabricated to determine the flow rate and heat(More)
A standard 0.35 micrometer CMOS technology has been extended for 100 V Power IC applications by accommodating reduced surface field (RESURF) LDMOSFET device with p-well block region or extended poly-overlap region for suppression of the drain wrapping potential. A 100 V integrated H-bridge circuit suitable for driving a brushless DC motor has been designed,(More)
In this paper, a predictive dead-beat proportional-integral (PI) current control algorithm is studied for shunt active power filters (APFs). To investigate the effectiveness of the proposed control scheme a digital control based simulation model is built using commercially available VisSim software. Performance comparison with different control schemes are(More)
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