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SUMMARY In-building power lines have often been considered as attractive media for high-speed data transmission, particularly for applications like home networking. In this paper, we develop models for power line channels based both on theoretical considerations and practical measurements. We consider power line channel frequency response and noise models(More)
Recently in-building power lines have been considered as a medium for high speed data transmission for applications like home networking and internet access. Frequency selec-tivity and time variation of this medium in addition to the high level of narrow-band and impulsive interference makes multi-carrier modulation, and especially its popular variant(More)
Efficient soft-decision decoding of Reed-Solomon codes is made possible by the Koetter-Vardy (KV) algorithm which consists of a front-end to the interpolation-based Guruswami-Sudan list decoding algorithm. This paper approaches the soft-decision Koetter-Vardy algorithm from the point of view of a communications systems designer who wants to know what(More)
—This paper introduces a novel scalable pipelined VLSI architecture for a 4 4 64-QAM hard-output multiple -input–multiple-output (MIMO) detector based on K-best lattice decoders. The key contribution is a means of expanding the intermediate nodes of the search tree on-demand, rather than exhaustively, along with three types of distributed sorters operating(More)
Delivering milliwatts of wireless power at centimeter distances is advantageous to many existing and emerging biomedical applications. It is highly desirable to fully integrate the receiver on a single chip in standard CMOS with no additional post-processing steps or external components. This paper presents a 2 × 2.18 mm(2) on-chip wireless power transfer(More)
The Koetter-Vardy algorithm is an algebraic soft-decision decoder for Reed-Solomon codes which is based on the Guruswami-Sudan list decoder. There are three main steps: 1) multiplicity calculation, 2) interpolation and 3) root finding. The Koetter-Vardy algorithm seems challenging to implement due to the high cost of interpolation. Motivated by a VLSI(More)
Field-programmable gate arrays for prototyping digital circuits are a widely endorsed approach for reducing time-to-market. Offering similar advantages, a field-programmable analog array (FPAA) for prototyping continuous-time linear analog circuits is reported here. Conceptually, a FPAA consists of configurable analog blocks (CABS) and interconnect. The(More)
I. INTRODUCTION Multiple-Input Multiple-Output (MIMO) systems have recently gained increasing attention in the development of competing wireless standards such as IEEE 802.16m and LTE-Advanced due to their high spectral efficiency. However, an efficient, high-throughput VLSI implementation of near-optimum 4 × 4 MIMO detectors has been a major design(More)
— In this paper new parallel structures are proposed for joint data and channel estimation over frequency selective Rayleigh fading channels. Maximum Likelihood Sequence Estimation (MLSE) is implemented using the per-survivor processing (PSP) method [1]. The Kalman filter and the Recursive Least Squares (RLS) algorithm are considered as estimation methods.(More)