P. Georgelin

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A DVB-S2 compliant codec is implemented in both 130nm-8M and 90nm-7M low-leakage CMOS technologies. The system includes encoders and decoders for both Low-Density Parity Check (LDPC) codes and serially concatenated BCH codes. All requirements of the DVB-S2 standard are supported including code rates between 1/4 and 9/10, block sizes of either 16,200 bits or(More)
We define the semantics of a synthesizable VHDL subset in a quantifier-free, first-order logic, and translate a VHDL description in the input format of the ACL2 theorem prover. We can use the same model for value simulation, symbolic simulation, and to prove properties expressed as theorems. The last two cases replace large or infinite number of simulation(More)
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