P. De Pauw

We don’t have enough information about this author to calculate their statistics. If you think this is an error let us know.
Learn More
A built-in I/sub DDQ/ monitor for CMOS digital circuits with low power supply voltage perturbation is presented. It minimizes the extra delay of the CUT in normal operation. An automatic recovery mechanism limits the drop in VDD voltage during the testing phase so the data storage is not perturbed. The I/sub DDQ/ current level may be measured by a standard(More)
  • 1