Osmar Marchi dos Santos

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Model transformation is one of the pillars of Model-Driven Engineering (MDE). The increasing complexity of systems and modelling languages has dramatically raised the complexity and size of model transformations. Even though many transformation languages and tools have been proposed in the last few years, most of them are directed to the implementation(More)
Model transformation is one of the pillars of model-driven engineering (MDE). The increasing complexity of systems and modelling languages has dramatically raised the complexity and size of model transformations as well. Even though many transformation languages and tools have been proposed in the last few years, most of them are directed to the(More)
Simulation is a bottleneck in the design flow of on-chip multiprocessors. This paper addresses that problem by reducing the simulation time of complex on-chip interconnects through transaction-level modelling (TLM). A particular on-chip interconnect architecture was chosen, namely a wormhole network-on-chip with priority preemptive virtual channel(More)
We verify a mutual exclusion protocol with dynamic process creation based on token passing. The protocol is specified using objectbased graph grammars. We introduce the protocol and show how the mutual exclusion property and other properties can be verified using the tool Augur, a verification tool for graph transformation systems based on an approximated(More)
The development of concurrent and reactive systems is gaining importance since they are well-suited to modern computing platforms, such as the Internet. However, the development of correct concurrent and reactive systems is a non-trivial task. Object-based graph grammar (OBGG) is a visual formal language suitable for the specification of this class of(More)
Wireless ad hoc networks raised a series of challenging research tracks. In order to analyze and validate the research results achieved, thorough performance evaluation efforts are needed. In this context, the contribution of this paper is two fold: at one side we investigate the effect of forwarding in wireless ad hoc networks, drawing the throughput(More)
An increasingly time-consuming part of the design flow of on-chip multiprocessors is the simulation of the interconnect architecture. The accurate simulation of state-of-the art network-on-chip interconnects can take hours, and this process is repeated for each design iteration because it provides valuable insights on communication latencies that can(More)
In this paper we make use of formal methods and tools as means to specify and reason about the behavior of distributed systems in the presence of faults. The approach used is based on the observation that a fault behavior can be modeled as an unwanted but possible transition of a system. It is then possible to define a transformation of a model M1 of a(More)
Priority inversion and priority inheritance protocols for bounding blocking time are well-understood topics in realtime systems research. The two most commonly used priority inheritance protocols are basic priority inheritance and priority ceiling emulation. Although both are supported in POSIX, Ada and the Real-Time Specification for Java (RTSJ), little(More)