Omar Kermia

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We address distributed real-time applications represented by systems of non-preemptive dependent periodic tasks. This system is described by an acyclic directed graph. Because the distribution and the scheduling of these tasks onto a multiprocessor is an NP-hard problem we propose a greedy heuristic to solve it. Our heuristic sequences three algorithms:(More)
Real-time systems are often designed using preemptive scheduling to guarantee the execution of high priority tasks. For multiple reasons there is a great interest in exploring non-preemptive scheduling in the case of hard real-time systems where missing deadline leads to catastrophic situations. This paper presents a necessary and sufficient schedulability(More)
In this paper we propose a greedy heuristic to solve the non preemptive multiprocessor static scheduling problem with precedence and strict periodicity constraints. The system of periodic tasks is described by a graph where dependent tasks are connected by precedence constraints. First, each task is repeated within the LCM of all periods of tasks(More)
This paper deals with load balancing and efficient memory usage for homogeneous distributed real-time embedded applications with dependence and strict periodicity constraints. Most of load balancing heuristics tend to minimize the total execution time of distributed applications by equalizing the workloads of processors. In addition, our heuristic satisfies(More)
This paper focuses on real-time nonpreemptive multiprocessor scheduling with precedence and strict periodicity constraints. Since this problem is NP-hard, there exist several approaches to resolve it. In addition, because of periodicity constraints our problem stands for a decision problem which consists in determining if, a solution exists or not.(More)
Hardware task scheduling and allocation at runtime increase the chip utilization ration and improve the system performance by exploring partially reconfigurable Field-Programmable Gate Arrays (FPGAs). Partial reconfiguration enables to change all or parts of the system hardware during the execution, in order to gain efficiency over static system.(More)
This paper focuses on the analysis of real-time non preemptive multiprocessor scheduling with precedence and several latency constraints. It aims to specify a schedulability condition which enables a designer to check a priori-without executing or simulating-if its scheduling of tasks will hold the precedences between tasks as well as several latency(More)
Intellectual Property (IP) cores represent the heart of the most advanced controller designed systems. In this work, a well-structured microcontroller IP-core named MCIP for "Microcontroller IP" is developed to provide not only major functionalities and features of a powerful microcontroller but to serve as a versatile tool for developing and validating new(More)