Olivier Ginez

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SEU is studied in a 90 nm SRAM cell with different simulation approaches. The SRAM cell main SEU parameters (maximum current peak, collected charge, threshold LET) are extracted and compared. It is(More)
The evolution of system-on-chip (SoC) designs involves the development of non-volatile memory technologies like flash. Embedded flash (eFlash) memories are based on the floating-gate transistor(More)
The embedded flash technology can be subject to complex defects creating functional faults. In this paper, we describe the different steps in the electrical modeling of 2T-FLOTOX core-cells for a(More)