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This note presents a control design method for determining proportional–integral-type controllers satisfying specifications on gain margin, phase margin, and an upper bound on the (complementary) sensitivity for a finite set of plants. The approach can be applied to plants that are stable or unstable, plants given by a model or measured data, and plants of(More)
This paper presents a method for the design of PID-type controllers, including those augmented by a 2lter on the D element, satisfying a required gain margin and an upper bound on the (complementary) sensitivity for a 2nite set of plants. Important properties of the method are: (i) it can be applied to plants of any order including non-minimum phase plants,(More)
A new design method is presented for the design of PLL loop filters for carrier recovery, bit timing, or other synchronization loops given the phase noise spectrum and noise level. Unlike the conventional designs, our design incorporates a possible large decision delay and S-curve slope uncertainty. Large decision delays frequently exists in modern(More)
In this paper, we develop design procedures for carrier tracking loop for orthogonal frequency division multiplexing (OFDM) systems or other systems of blocked data. In such communication systems, phase error measurements are made infrequent enough to invalidate the traditional loop design methodology which is based on analog loop design. We analyze the(More)