O. Sarbishei

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This paper presents a novel automatic debugging algorithm for a postsynthesis combinational arithmetic circuit. The approach is robust under wide varieties of arithmetic circuit architectures and design optimizations. The debugging algorithm in this paper consists of three phases of partial product initialization, XOR extraction, and carry-signal mapping.(More)
Analyses of range and precision are important for high-level synthesis and verification of fixed-point circuits. Conventional range and precision analysis methods mostly focus on combinational arithmetic circuits and suffer from major inefficiencies when dealing with sequential linear-time-invariant circuits. Such problems mainly include inability to(More)
Fixed-point accuracy analysis and optimization of polynomial data-flow graphs with respect to a reference model is a challenging task in many digital signal processing applications. Range and precision analysis are two important steps of this process to assign suitable integer and fractional bit-widths to the fixed-point variables and constant coefficients(More)
Fixed-point Fast Fourier Transform (FFT) units are widely used in digital communication systems. The twiddle multipliers required for realizing large FFTs are typically implemented with the Coordinate Rotation Digital Computer (CORDIC) algorithm to restrict memory requirements. Recent approaches aiming to optimize the bit-widths of FFT units while(More)
RSA based SmartCards have been widely used in security services such as secure data transmission in many applications over the past few years. Generation of a secure key pair which is based on finding a pair of large prime numbers is an indispensable part of creating a secure channel. This paper describes a novel approach for secure and fast key generation(More)
Datapath designs that perform polynomial computations over Z<sub>2</sub><sup>n</sup> are used in many applications such as computer graphics and digital signal processing domains. As the market of such applications continues to grow, improvements in high-level synthesis and optimization techniques for multivariate polynomials have become really challenging.(More)
In this paper, we propose a novel approach to extract a network of half adders from the gate-level net-list of an addition circuit while no internal equivalences exist. The technique begins with a gate-level net-list and tries to map it into word-level adders based on an efficient bit-level adder representation. It will be shown that the proposed technique(More)
This paper presents a new technique for scaling the intermediate variables in implementing fixed-point polynomial-based arithmetic circuits. Analysis of precision has been used first to set the input and coefficient bit-widths of the polynomial so that a given error bound is satisfied. Then, we present an efficient approach to scale and truncate different(More)
Multi-sensor data fusion is an efficient method to provide both accurate and fault-tolerant sensor readouts. Furthermore, detection of faults in a reasonably short amount of time is crucial for applications dealing with high risks. In order to deliver high accuracies for the sensor measurements, it is required to perform a calibration for each sensor. This(More)
Analysis of range and precision is always an important task for high level synthesis and verification. Although several researches have been dedicated to these two problems, in the case of linear fixed-point arithmetic circuits with feedbacks such as an Infinite Impulse Response (IIR) filter, conventional approaches are either constituting major(More)