O. Lignier

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System integration is clearly a driving force of innovation in packaging. The need for miniaturization has led to new system in package architectures, which combine disparate technologies. When several dies have to be connected in a small package, stacking appears to be the best solution. However, this 3D packaging has to satisfy high interconnection(More)
Chip stacking has emerged as the best solution to reduce the packaging size (Karnezos, 2004). Several approaches are proposed by companies and laboratories and each of them presents specific advantages and drawbacks (Tummala, 2004). Today, major 3D applications are stacked memory DRAM, SRAM or flash. Moreover, cost acts as a brake on 3D expansion in SiP and(More)
Decoupling is a long-standing problem which our first works carried out on VHSIC decoupling, which at that time linked 100 bits, led to significant power noise reductions (réf. 1 and 2). Recently, WINKEL (ref. 3) made it clear that “Modern, especially high integrated, systems needs new, the so called hierarchical decoupling strategies, in order to cover the(More)
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