Noorfazila Kamal

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Phase-Locked Loops (PLLs) are a commonly used module in frequency synthesizers as part of RF transceivers. Simulating these modules is very time consuming. Therefore, a number of approaches to evaluate the performance of these modules through high level behavioural modelling are developed, where the focus is on the random noise aspect of these modules. In(More)
This study reports research findings on the use of custom animation to teach electrical, electronic & system engineering students enrolling in Fiber to the Home (FTTH) system course at the National University of Malaysia. Even with over 10 years of experience in teaching the fiber optic course, the authors found it very difficult to clearly describe the(More)
Modern Radio Frequency (RF) transceivers cannot be imagined without high-performance (Transmit/Receive) T/R switch. Available T/R switches suffer mainly due to the lack of good trade-off among the performance parameters, where high isolation and low insertion loss are very essential. In this study, a T/R switch with high isolation and low insertion loss(More)
A prescaler is widely used in frequency synthesizers in order to handle channel selection. The division ratio has to be chosen carefully to achieve the desired frequency. In this paper, we present a 6 modulus prescaler in a 0.18 μm SiGe BiCMOS technology. The prescaler is part of a 60 GHz frequency synthesizer. In addition, we present a frequency planning(More)
High speed frequency dividers are critical parts of frequency synthesisers in wireless systems. These dividers allow the output frequency from a voltage controlled oscillator to be compared with a much lower external reference frequency that is commonly used in these synthesisers. Common trade-offs in high frequency dividers are speed of division, power(More)
The demand for low voltage devices has initiated the development of Low Drop Out (LDO) regulator in manifold. This paper presents a review of various LDO frameworks that have been implemented in CMOS technologies and the impact of frameworks related to the parameters of the LDO. The LDO architecture is evaluated through its Power Supply Rejection (PSR) and(More)
This article presents a dual mode receiver architecture for Bluetooth and IEEE 802.11b standards at 2.4 GHz. In order to fulfill the increasing demand of data capacity, IEEE 802.11 WLAN is one of the most deployed technologies. On the other hand Bluetooth is imperative for wireless personal area network (WPAN) solution. Both standards use the 2.4 GHz band.(More)
Current comparators are extensively used in current steering (CS) digital to analog data converters (DAC) which are used in almost all digital devices now days. With the growing demand for higher operation speed and longer battery life, it is crucial that the propagation delay and the power consumption of current comparator circuitry be further reduced. To(More)
Surface Plasmon Resonance (SPR) has become a popular method for the analysis of molecular interaction. There are many different approaches for the detection of SPR, however, the Phase detection method is quite sensitive in that it shows a much sharper change under SPR compared with other alternatives such as intensity and angle interrogation techniques. The(More)
A design of the proposed VCO was developed for PLL in radio frequency identification (RFID) application. By using current starved ring oscillator, the designed circuit is simulated using 0.18-μm CMOS process in Mentor Graphics environment. The results show that the voltage drawn is around 5V supplied at VDD, and the product of this current and voltage has(More)