Nitzan Weinberg

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Evaluating high-level language pointer-expressions can require a significant portion of the execution time and memory bandwidth in programs, especially for pointers with multiple memory accesses and address computations. Often such pointers repeatedly follow the same evaluation paths and return the same values. We present a microarchitecture technique that(More)
The DSNC chip implements one neural network layer having 25 fully inter-connected neurons. It is a digital, systolic, pipelined, integer based architecture. The chip is primarily designed for image processing tasks devised upon the basic backpropagation neural-network algorithm. Forward processing as well as learning are supported and carried out in(More)
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