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Due to the heterogeneity of network processor architectures and constantly evolving network applications, it is currently a challenge to compare or evaluate network processors. In this paper, we present principles of a benchmarking methodology that aim to facilitate the realistic evaluation and comparison of network processors. A key aspect of our approach(More)
Network processors have great potential to combine high performance with increased flexibility. These multiprocessor systems consist of programmable elements, dedicated logic, and specialized memory and interconnection networks. However, the architectural complexity of the systems makes programming difficult. Programmers must be able to productively(More)
MultiPoint is a speech and pen user interface for building presentations, implemented as an add-on to Microsoft PowerPoint™. In this study, we compared users' performance between building presentations with MultiPoint and with PowerPoint. We also compared participants' performance between using Wizard of Oz (Woz) speech recognition and computer speech(More)
Numerous programmable alternatives to network processing have emerged in the past few years to meet the current and future needs of network equipment. They all promise various trade-offs between performance and flexibility. In this paper we attempt to understand these new network processing alternatives. We present five major aspects of network processor(More)
Long terminal repeat (LTR) retrotransposons are closely related to retroviruses, and their activities shape eukaryotic genomes. Here, we present a complete Lotus japonicus insertion mutant collection generated by identification of 640 653 new insertion events following de novo activation of the LTR element Lotus retrotransposon 1 (LORE1)(More)
The mapping of application functionality onto multiple multithreaded processing elements of a high performance embedded system is currently a slow and arduous task for application developers. Previous attempts at automation have either ignored hardware support for multithreading and focused on scheduling, or have overlooked the architectural peculiarities(More)
The exponential increase in the complexity of integrated circuits due to Moore’s Law poses tough challenges for the design and design automation communities. First, the design of individual devices and associated interconnect is becoming harder due to the deep sub-micron effects resulting in increasing interconnect delay and coupling. Second, there are(More)