Nikolina Frid

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In this paper the authors propose new heuristics for automation of software partitioning and mapping onto heterogeneous multiprocessor System-on-Chip (MPSoC) platform - Longest Parallel Path mapping algorithm (LPP). In contrast with traditional approach to solving this NP-complete problem - the Integer Linear Programming (ILP), our method uses a modified(More)
Embedded systems have become an integral part of High Performance Computing (HPC) due to their appealing energy and resource consumption characteristics. Required performance goals can be achieved only by deploying the application on a heterogeneous platform. The established approach of designing a custom made FPGA architecture platform targeting particular(More)
Trade-off between execution time and resource occupation arise in all kinds of digital system designs. Here we present such relation for FPGA-based custom processor design. Usually, the optimal tradeoff is directed by device sizing on all scales of the design, but for FPGA device, as predefined hardware platform, it is more focused on comparison of existing(More)
Effective use of resources available on heterogeneous MPSoC platforms can only be achieved through careful resource allocation and scheduling. The diversity of processing and memory elements will manifest itself in the total time and resources required to perform a task or execute an application. Choosing the right platform element is the key and the first(More)
In this paper, the preliminary results of E2LP Base Board platform introduction to students of Faculty of EE and Computing master programme enrolled in Laboratory of Computer Engineering 2 course are presented and discussed. The aim of introduction of new hardware unified platform was to improve practical skills and experience in embedded system design. The(More)
This paper explores the alternatives to a standard software implementation of DCT transformation algorithm, an IEEE standard 1180 definition, and compares the obtained results on FPGA development boards such as Spartan-3E and Virtex-5 with 32-bit MicroBlaze™ soft-core processor. Three cases of implementation are presented: a software implementation(More)
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