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SUMMARY Compressive sampling (CS) offers bandwidth, power, and memory size reduction compared to conventional (Nyquist) sampling. These are very attractive features for the design of modern complementary metal-oxide semiconductor (CMOS) image sensors, cameras, and camera systems. However, very few integrated circuit (IC) designs based on CS exist because of(More)
BACKGROUND Current recommendations for portal placement in laparoscopy are often imprecise. The aim of this study was to establish and evaluate a mapping system for portal placement during laparoscopic procedures in small animals. Sixty-four final-year veterinary students took part in this in papyro study. Descriptions of portal placements of two recent(More)
Keywords: Flash ADC Time-to-digital converter Fully-digital Pulse-based Time-domain a b s t r a c t The concept of time-domain reference-ladder for the implementation of fully-digital flash-ADCs is proposed in this work. The complete reference ladder is implemented using only digital circuits. Based on this concept, a flash ADC is proposed and implemented(More)
—A micro-watt power subthreshold current modu-lator suitable for low-power and low-noise sensor interfaces is presented. The prototype design is based on Subthreshold Source Coupled Logic (STSCL) cells and implemented in a 0.18 µm standard CMOS technology. The modulator operates with the supply voltage of 0.8 V which is significantly lower than the nominal(More)
A novel compressive sampling scheme suitable for highly scalable hardware implementation is presented. The prototype design is implemented in a 0.18μm standard CMOS technology and utilizes compressed acquisition to achieve high frame rates and maintain low power consumption. Specialized pixels, convenient for Comparator-Based Switched Capacitor readout(More)
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