Nejmeddine Jouida

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This paper presents a highly digitized receiver for a single chip digital radio receiver. The RF front-end has been based on a low-IF architecture and does not require any variable gain or filtering blocks. The full dynamic range of the low-IF signals is converted into the digital domain by a low-power high-resolution continuous-time (CT) ∆Σ(More)
This paper presents the design of an image-reject continuous-time (CT) quadrature bandpass (QBP) ∆Σ modulator using a tailored signal-transfer-function (STF) design. The quadrature delta-sigma noise shaping with polyphase filter implementations and strategic IF placement effectively improve image rejection internally. The Fifth-order CT QBP ∆Σ modulator(More)
This paper presents a new methodologie of a decimator filter design in a multistandard receiver architecture for WiFi and Bluetooth. This filter must satisfy the specifications of a fifth DeltaSigma complex bandpass modulator which operates at a sample rate of 160 MHz. The function of the decimator filter is to make the channel digital selection for duo(More)
Abstrac tContinuous-Time delta sigma modulators (CT ∆ΣM), by their nature, are mixed-signal systems. That fact creates a discontinuity in the traditional IC design flow which assumes that “discrete” and “continuous” time domain designs require separate design tools. In this work, we present a top level behavioral approach of modeling CT complex Bandpass(More)
This paper presents a top-down design process for continuous-time (CT) DeltaSigma modulator. Design strategy is illustrated through a fifth-order modulator designed for Bluetooth, WiFi and WiMAX which exemplify clearly the design methodology. Numerous simulations make obvious that the formulate strategy can be successfully applied to practical problems.
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