Neelakantan Narasimman

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In this paper, we propose a novel Capacitance to Digital Converter (CDC) architecture using a second order continuous time delta-sigma modulator (CT-ΔΣM) with multi-bit quantization. The proposed architecture embeds a Capacitance to Voltage Converter (CVC) in the delta-sigma loop for improving the dynamic range and the energy efficiency of the(More)
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