Nean Sern. Lee

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In this paper, we present one simple die-level backside silicon thinning preparation approach to enable fault localization of vertical trench or highly doped silicon substrate power semiconductor devices. The methodologies are illustrated for understanding and immediate application at any lab environment. Effectiveness of the method is evaluated through(More)
Generally, crystal defect is able to induce photon emission event for detection by emission microscopy (EMMI) equipment. However, due to thick, dense metallization and high doped substrate, effective detection by EMMI alone is not always reliable. Thus, further isolation, layout information and verification are required through OBIRCH analysis, CAD(More)
Transmission electron microscopy (TEM) and chemical preferential etching are failure analysis techniques commonly applied to visualize and characterize silicon crystalline defect. Both techniques are applied in this case study of a protected field-effect transistor (FET) that encounter output leakage failure. Upon fault isolation, a complete analysis(More)
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