Navid Toosizadeh

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— Synchronous pipelines usually have a fixed clock frequency determined by the worst-case process-voltage-temperature (PVT) analysis of the most critical path. Higher operating frequencies are possible under typical PVT conditions, especially when the most critical path is not triggered. This paper introduces a design methodology that uses asynchronous(More)
The method presented in this paper is mostly based on recognition using vertical and horizontal projections of Persian digits, along with other characteristics of them. The presented method makes recognition of Persian digits fast with 0% error. Since, at this stage the main goal is designing an algorithm suitable for hardware implementation, a single size(More)
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