Natividad Martínez Madrid

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This paper introduces a denotational semantics for a core of the draft IEEE standard analog and mixed signal design language VHDL-AMS, and derives general results about the behaviour of VHDL-AMS programs from it. We include, for example, a demonstration that VHDL-AMS parallelism is benign in the absence of shared initializations. As proof of concept we have(More)
This paper presents a methodology for hardware-software co-design. It is based on the formal description technique LOTOS in the specification phase, and on estimation methods at different levels of abstraction in the partitioning phase. The LOTOS specification describes the system as a set of interacting communicating processes. Our HW-SW partitioning(More)
A formal refinement calculus targeted at system-level descriptions in the IEEE standard hardware description language VHDL is described here. Refinement can be used to develop hardware description code that is “correct by construction”. the calculus is closely related to a Hoare-style programming logic for VHDL and real-time systems in general.(More)
Current System-on-Chip (SoC) designs incorporate anincreasing number of mixed-signal components. Designreuse techniques have proved successful for digital designbut these rules are difficult to transfer to mixed-signal design.A top-down methodology is missing but the low levelof abstraction in designs makes system integration and verificationa very(More)
Large and complex systems design is still being a challenge even bigger when developing embedded, distributed or real-time systems. OSGi is a platform created to reduce some of the software design problems, increasing reusability, modularity, etc. While, MDA is also designed to simplify software process development using different modelling layers. This(More)
The application and development of reusable components (Intellectual Property, IP) has become a regular part of modern design practices. The IP provider on the one hand side and the IP integrator (user) on the other side may be in the same company or separate participants in the microelectronic design market. In both cases, the transfer of IP remains a(More)
Reuse of semiconductor IP modules is widely perceived as a means to overcome the design gap [1], enabling the development of complex systems-on-chip under narrow manpower and time-tomarket constraints. However, for the IP business to be a success, many requirements related to the portability, maintainability, and quality of an IP module must be met. This(More)
A new formal method for the specaficataon of real-tame system requarements and thew refinement t o a deszgn archatecture as set out here. Thas antegrated method as deraved from a recently developed formal semantacs, logac and refinement calculus for the IEEE standard hardware speczficataon language VHDL. The specaficataon format consasts of three-phase(More)
Currently, several multimedia devices support the UPnP protocol allowing automatic detection of devices, connection of devices and agreement on a certain quality of the communication established between a server of content (Media Server) and a player of content (Media Renderer). The focus of this paper is to add to the UPnP standard quality of service (QoS)(More)