Nan-Jian Wu

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—This paper proposes a novel programmable vision chip based on multiple levels of parallel processors. The chip integrates CMOS image sensor, multiple-levels of SIMD parallel processors and an embedded microprocessor unit (MPU). The multiple-levels of SIMD parallel processors consist of an array processor of SIMD processing elements (PEs) and a column of(More)
—This paper proposes a novel phase-locked loop (PLL) frequency synthesizer using single-electron devices (SEDs) and metal-oxide-semiconductor (MOS) field-effect transistors. The PLL frequency synthesizer mainly consists of a single-electron transistor (SET)/MOS hybrid voltage-controlled oscillator circuit, a single-electron (SE) turnstile/MOS hybrid(More)
SUMMARY A single-electron turnstile and electrometer circuit was fabricated on a silicon-on-insulator substrate. The turnstile, which is operated by opening and closing two metal-oxide-semiconductor field-effect transistors (MOSFETs) alternately, allows current quantization at 20 K due to single-electron transfer. Another MOSFET is placed at the drain side(More)
Keywords: Fast adder Non-binary arithmetic Counter tree diagram Single-electron devices Signed-digital-adder a b s t r a c t This paper proposes compact adders that are based on non-binary redundant number systems and single-electron (SE) devices. The adders use the number of single electrons to represent discrete multiple-valued logic state and manipulate(More)
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