Nam Sung Woo

Learn More
In this paper, we propose a layout driven synthesis approach for Field Programmable Gate Arrays (FPGAs). The approach attempts to identify alternative wires and alternative functions for wires that cannot be routed due to the limited routing resources in FPGA. The alternative wires (in the logic level) that can be routed through less congested areas(More)
We &veloped a new meth~ called MP2, for partitioning networks into multiple (> 2) blocks each of which has both size and pin constraints. The MP2 method uses an improvement approach snd tries to minimize the total number of terrnintds of tdl blocks while sstistjing the pin and size constraints of every block It supports multiple classes of cells in input(More)
We developed a new algorithm for efficient register allocation and binding used in data path synthesis. Our algorithm determines both the <italic>number</italic> of registers and the <italic>mapping</italic> from variables to registers simultaneously during data path allocation so that the cost, i.e., area, of the registers and connections to/from the(More)