Nail Etkin Can Akkaya

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A myriad of security vulnerabilites can be exposed via the reverse engineering of the integrated circuits contained in electronics systems. The goal of IC reverse engineering is to uncover the functionality and internal structure of the chip via techniques such as depackaging/delayering, high-resolution imaging, probing, and side-channel examination. With(More)
Side channel attacks exploit inadvertent information leakage from the physical implementation of computing systems, bypassing the theoretical strength of cryptographic algorithms. Of particular concern are software side-channel attacks which can be mounted remotely without access or alteration of the hardware system. One type of attack that has been(More)
Differential power analysis (DPA) has been shown to be a highly effective and easy to mount side-channel attack. One effective method of increasing DPA resistance is to use three-phase dual-rail pre-charge logic (TDPL), but this type of logic is vulnerable to manipulation of the clock generation/distribution hardware. If an attacker can slow down the clock,(More)
The implementation of the SubBytes (or S-Box) step of the AES algorithm significantly contributes to the area, delay, and power of AES accelerators. Unlike typical logic gate S-Box implementations, we use full-custom 256×8-bit ROMs, which significantly improve performance and efficiency. We implemented a fully-unrolled, pipelined AES-128 encryption(More)
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