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The electro-thermal behavior of NPNs fabricated in a backwafer contacted silicon-on-glass integrated bipolar process has been investigated experimentally and the results are supported by 2D MEDICI simulations including the lattice heating equation. The devices are fabricated in silicon islands, the smallest of which is 23/spl times/10/spl times/0.94 /spl(More)
In this paper an application of an integral analysis technique is demonstrated for determining Signal Integrity (SI) and Power Integrity (PI) of complex and advanced package solutions. A representative System-in-Package (SiP) product has been selected as a carrier for our study, which is focused on analysis methodology, tools and flow. In particular,(More)
Electrothermal consequences of implementing bulk-silicon RF power MOS processes in the silicon-on-glass sub-strate transfer technology are investigated in this paper. Fabricated silicon-on-glass vertical double-diffused MOSFETs are measured on-wafer and very large thermal resistance values are extracted for each design. The influence of the thermal(More)
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