Myung-Ho Jung

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The fusion of graphene with silicon may provide an effective solution to the problem of scale in electronic devices. This approach will allow the excellent electronic properties of graphene to be combined with known Si device technologies. We review the epitaxial growth of graphene on Si substrates (GOS) for fabricating transistors. GOS has been(More)
Self-aligned source/drain (S/D) graphene field-effect transistors (GFETs) with extremely small access lengths were successfully fabricated using a simple device fabrication process without sidewall spacer formation. The self-aligned S/D GFET exhibits superior electrical characteristics, such as the intrinsic carrier mobility of 6100 cm<sup>2</sup>/Vs, the(More)
The electrical characteristics of thin strained-silicon-on-insulator (sSOI) wafers were evaluated, and the effects of annealing processes on the back interface states of sSOI wafers were analyzed by using the back-gated (BG) metal-oxide-semiconductor field-effect-transistor structure. The electrical characteristics of the BG MOSFET fabricated on sSOI wafers(More)
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