Myoung-Seo Kim

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Future heterogeneous systems will integrate CPUs and GPUs on a single chip to achieve high computing performance as well as high throughput. In general, it would discard the current discrete pattern and will build a uniformed shared memory system avoiding explicit data movement among CPUs and GPUs connected by high throughput NoC. We propose a scalable(More)
Multimedia system-on-a-chip (SoC) platform designs nowadays are facing some conflicting issues regarding product development. One is induced by increasing design complexity and another is induced by decreasing time-to-market. Hence, designers are seeking a more efficient and reliable methodology in order to design complex multi-million gate SoC under such(More)
Energy-efficiency is one of the most challenges of designing future heterogeneous multicore system, beyond performance, hereby we propose a performance-energy efficiency analytical model for integrated heterogeneous parallel multicore system which is promising to be used for big data applications. The model extends the traditional computing-centric model by(More)
This paper presents a low complexity 4x4 block intra prediction algorithm for H.264/AVC by reducing the original 9 prediction modes to 3 sub-sampled ones. The proposed algorithm takes advantage of the directional similarity found in the original ones to predict the most probable mode. The simulation result shows that the proposed algorithm can the(More)
The main challenge in designing mobile embedded systems for internet of things is to provide a solution that has the limitied power by battery lifetime, in addition to overcome frequent battery recharging or replacement. The help of solar and wind energy harvesting systems is an attractive method to increase the autonomy of mobile embedded systems for(More)
We extend Amdahl's law by considering the overhead of data preparation (ODP) for multicore systems, and apply it to three “traditional” multicore system scenarios (homogeneous symmetric multicore, asymmetric multicore, and dynamic multicore) and two new scenarios (heterogeneous CPU-GPU multicore and dynamic CPU-GPU multicore). It demonstrates(More)
In application-specific multiprocessor system-on-a-chips (MPSoC), the complexity of a general-purpose interface control block which implements input/output (I/O) paths for off-chip communication has increased exponentially in recent years. In addition, several inherent issues exist in the design of general-purpose interface control blocks, since many(More)