Myint Wai Phyu

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In this paper, an integrated electrocardiogram (ECG) signal-processing scheme is proposed. Using a systematic wavelet transform algorithm, this signal-processing scheme can realize multiple functions in real time, including baseline-drift removal, noise suppression, QRS detection, heart beat rate prediction and classification, and clean ECG reconstruction.(More)
A novel explicit-pulsed dual-edge triggered sense-amplifier flip-flop (DET-SAFF) for low-power and high-performance applications is presented in this paper. By incorporating the dual-edge triggering mechanism in the new fast latch and employing conditional precharging, the DET-SAFF is able to achieve low-power consumption that has small delay. To further(More)
In this paper, a miniature low-power Electrocardiogram (ECG) signal processing application specific integrated circuit (ASIC) chip is proposed. This chip provides multiple critical functions for ECG analysis using a systematic wavelet transform algorithm and a novel SRAM-based ASIC architecture, while achieves low cost and high performance. Using 0.18 µm(More)
This paper proposes a power and area efficient electrocardiogram (ECG) signal processing application specific integrated circuits (ASIC) for wireless body area networks (WBAN). This signal processing ASIC can accurately detect the QRS peak with high frequency noise suppression. The proposed ECG signal processor is implemented in 0.18μm CMOS(More)
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