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This paper presents a high speed, non-pipelined FPGA implementation of the Rijndael algorithm (Daemen, 1999), which has been selected as the new AES algorithm by the National Institute of Standards and Technology (NIST). In this study, we have implemented both the encryption and the decryption algorithms of Rijndael on the same FPGA. All the key and data(More)
Narrowband single-ended inductive source degenerated low noise amplifiers (LNAs) for "system-on-chip" receiver stages have been designed, simulated and compared using the Mietec CMOS 0.7 /spl mu/m process and the Cadence/BSIM3v3 tool with active or L-biased DC-bias circuitries. Since there is an intention to use LNAs for GSM and S-band low earth orbit (LEO)(More)