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On-chip communication, including short, often-multicast, latency-critical coherence and synchronization messages, and long, unicast, throughput-sensitive data transfers, limits the power efficiency and performance scalability of many-core chip-multiprocessor systems. This article analyzes on-chip communication challenges and studies the characteristics of(More)
Recent advances in silicon photonic device and fabrication technologies make silicon photonic interconnect a promising communication fabric to address the inter-core and inter-die interconnect challenges for future embedded many-core processors. Informed design decisions in silicon photonic interconnection require optimization of performance, power(More)
The nanophotonic network promises improved communications between cores in many-core systems. This paper discusses a novel modeling and simulation methodology. This infrastructure can compare performance, power consumption and reliability of nanophotonic network designs. Phenomenologically determined transfer-matrix device models are employed to(More)
—Optical interconnection networks, as enabled by recent advances in silicon photonic device and fabrication technology, have the potential to address on-chip and off-chip communication bottlenecks in many-core systems. Although several designs have shown superior power efficiency and performance compared to electrical alternatives, these networks will not(More)
Recent advances in nanophotonic technology have made nano- photonic interconnect an attractive on-chip communication solution for emerging many-core systems. However, fabrication- induced process variation and run-time system thermal effects directly affect nanophotonic device operation, and introduce serious challenges, e.g., signal power loss and(More)
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