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The quality of service network on chip (QNoC) is the most effective solution that provides low latency transfers and power efficient system on chip (SoC) interconnect. This study presents two generic globally asynchronous locally synchronous (GALS) NoC architectures called GHXPolygon (for generic extended polygon) and GHXSpidergon (for generic extended(More)
Current VLSI systems-on-Chips (SoCs) integrate billions of transistors and are clocked with multi-gigahertz clock frequencies. As the geometrical dimensions of both devices and wires in theses systems become smaller, the internal communication performance between the SoC's blocks is heavily affected by the on-chip interconnect wire delays. In this paper, we(More)
Flip-flops with output enable are crucial elements for the design of digital systems. With the aggressive scaling in feature sizes, they start to pose some challenging problems for designers. This is due to their synchronous nature that represents the main cause of both the high digital noise that they generate and the significant fraction of power that(More)
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