Moty Mehalel

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This paper describes the second-generation Intel Core processor, a 32-nm monolithic die integrating four IA cores, a processor graphics, and amemory controller. Special attention is given to the circuit design challenges associated with this kind of integration. The paper describes the chip floor plan, the power delivery network, energy conservation(More)
A 20-way set associative 20MB energy efficient L3 this paper. The design uses 0.2119um<sup>2</sup> cell and is manufactured in the 32nm second generation of high-K dielectric metal gate process with 9-copper layers. The power efficiency was achieved by employing advanced power saving schemes and effective Vccmin design techniques. The proposed L3 cache(More)
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