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This paper analyzes the effect of variations in the parameters of an Integrated Voltage Regulator (IVR) and its impact on the power/performance of a system of IVR driven digital logic circuit. The coupled analysis of IVR and digital logic considering variations in the integrated passives, power train FETs and controller transistors shows, compared to an(More)
This paper explores fully integrated inductive voltage regulators (FIVR) as a technique to improve the side channel resistance of encryption engines. We propose security aware design modes for low passive FIVR to improve robustness of an encryption-engine against statistical power attacks in time and frequency domain. A Correlation Power Analysis is used to(More)
Low-drop-out (LDO) voltage regulator modules are being increasingly integrated in the modern processors for efficient power management. This paper shows that an integrated All-Digital LDO (ADLDO) can also be used as a countermeasure against power measurement based side channel attacks. The current transformation introduced by integrated digital LDOs,(More)
This paper shows that inductive integrated voltage regulators (IVR) provide significant immunity to traditional power attacks on crypto encryption engines based on time-domain analysis of the chip current. Frequency-domain analyses of envelope and duty cycle of the current are identified as new attack modes. The security-aware IVR design is discussed to(More)
This paper presents a bond-wire inductance and ondie capacitance based high-frequency Integrated Voltage Regulator (IVR) with multi-sampled digital controller and alldigital auto tuning engine to tolerate parameter variations of ondie/package-integrated passives. A 130nm CMOS test-chip demonstrates a 125MHz IVR with 250MHz compensator. The auto-tuning shows(More)
Distributed small-scale electronics for IoT applications are on the rise. Power delivery for such electronics requires innovative design techniques to improve energy efficiency. This paper summarizes energy delivery challenges for IoT devices and discusses several design techniques for efficient power delivery units. Such design solutions cover challenges(More)
The design of low power and side-channel-attack resistant encryption engine is a key challenge to enhance security of resource-constrained platforms. This paper present case studies to show that the low-power requirement is a challenge as well as an opportunity for improving side-channel resistance. On one hand, low-power encryption architecture can be more(More)
— A low power adaptive sampling rate ECG signal acquisition system is proposed. The system uses a capacitive coupled (CC-ECG) sensor which is easily wearable and particularly suited for long term application. An ultra-low power instrumentation amplifier with a superior noise figure followed by a filter bank extracts the desired component from the collected(More)