Mohammed Nael Taha

We don’t have enough information about this author to calculate their statistics. If you think this is an error let us know.
Learn More
Various techniques can be used to reduce the test time and cost of chip development, some of which achieve their objective by reducing the test data volume through the implementation of compression technologies such as XOR-based decompressors. In the presence of XOR decompressor, the delivery of acceptable (encodable) test patterns might not be possible.(More)
Utilisation of input compatibilities alleviates test costs in many applications such as reducing linear feedback shift register (LFSR) size, and scan tree construction among others. Correlation among inputs, identified based on a test set analysis, can be exploited by driving the circuit inputs through fewer channels. The reduction in the number of(More)
  • 1