Mohamed El-Hadedy

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In this paper we describe in details the tweaked cryptographic hash function Edon-R that we denote as Edon-R′. Edon-R was submitted as a candidate for SHA-3 hash competition organized by National Institute of Standards and Technology (NIST). The difference between originally submitted version of Edon-R and version Edon-R′ is in the added(More)
This is the first implementation in FPGA of the recently published class of public key algorithms - MQQ, that are based on quasigroup string transformations. Our implementation achieves decryption throughput of 399 Mbps on an Xilinx Virtex-5 FPGA that is running on 249.4 MHz. The encryption throughput of our implementation achieves 44.27 Gbps on an Xilinx(More)
In today’s world of big data and rapidly increasing telecommunications, using secure cryptographic primitives that are parallelizable and incremental is becoming ever more important design goal. π-Cipher is parallel, incremental, nonce based authenticated encryption cipher with associated data. It is designed with the special purpose of providing(More)
Micron's Automata Processor (AP) efficiently emulates non-deterministic finite automata and has been shown to provide large speedups over traditional von Neumann execution for massively parallel, rule-based, data-mining and pattern matching applications. We demonstrate the AP's ability to generate high-quality and energy efficient pseudo-random behavior for(More)
Hash functions are widely used in information security and cryptography. They are used in countless applications such as message authentication codes (MAC), Digital Signatures (DS) and mobile trusted modules (MTM). Serious attacks have been reported against cryptographic hash algorithms, including SHA-1. Because the SHA-1 and SHA-2 families share a similar(More)
This paper presents the design and analysis of an area efficient Blue Midnight Wish compression function with digest size of 256 bits (BMW-256) on FPGA platforms. The proposed architecture achieves significant improvements in system throughput with reduced area. We demonstrate the performance of the proposed BMW hash function core using VIRTEX 5 FPGA(More)