Mohamad Khairi Ishak

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An approach for cheap and deterministic control communication using Ethernet real-time control communication is presented. Field-programmable gate array (FPGA) technology, i.e Xilinx XC3S500E from the Spartan-3E family, is used to implement the Ethernet communication strategy. The unit is defined in Verilog using Xilinx ISE 11.1 software tools. Data(More)
The aim of this paper is to develop an approach for cheap and deterministic control communication using Ethernet. A half-duplex Ethernet network populated with a small/medium number of Media Access Controllers (MACs) is used for timed real-time communication. Data packages are sent at well defined times to avoid collisions. Collisions mainly occur due to(More)
The aim of this paper is to develop an approach for cheap and deterministic control communication using Ethernet. A half-duplex Ethernet network populated with a small/medium number of Media Access Controllers (MACs) is used for timed real-time communication. Data packages are sent at well defined times to avoid collisions. Collisions mainly occur due to(More)
In earlier work, we suggested a low cost control communication scheme across half-duplex Ethernet allowing for reduced jitter and delay for an information sharing control communication bus. The principle advantage of half-duplex Ethernet is the reduced number of wires (two versus four wires) and the reduced cost of switch/router equipment. The basic(More)
This paper proposes classifying the signal of movement intention and identifying feature selection and translation algorithms. Furthermore, this paper will select the most appropriate algorithms for the feature classification of the signal of movement intentions. The study uses signals previously recorded in the BCI lab. Feature selection and classification(More)
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