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With continuous and aggressive technology scaling, suppressing the stand-by power is among the top priorities for SRAM design. Switching off the less-frequently accessed blocks is an efficient way to reduce the stand-by power, provided that the information stored in these blocks can be restored. Non-volatile memories (NVMs) are integrated into SRAM cells to(More)
A greater part of the low power design methodology is allocated for reducing leakage current. This plays a vital role in static power dissipation. In this project, a current comparison domino pull-up network with its worst case leakage current is compared with Current comparison based Domino (CCD) with Clamped bit-line Current-sensing Amplifier circuit.(More)
Domino CMOS logic circuit family finds a wide variety of applications in microprocessors, digital signal processors, and dynamic memory due to their high speed and low device count. These dynamic circuits are often favored in high performance designs because of the speed advantage offered over static CMOS logic circuits. In this paper, AND gates with(More)