Mitchell Lin

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This paper describes a novel DfT solution to the adaptive linear equalizer in the receiver of a high-speed serial link. We first summarize various equalization architectures, adaptive algorithms, circuit implementations, and their variations to which the proposed solution can be applied. The solution addresses the observability problem of the equalizer and(More)
This paper describes a DfT solution for modern serial-link transceivers. We first summarize the architectures of the Crosstalk Canceller and the Equalizer used in advanced transceivers to which the proposed solution can be applied. The solution addresses the testability and observability issues of the transceiver for both characterization and production(More)
Testing PCI-Express (PCI-E) interface at 2.5Gb/s in production is challenging and very expensive. This paper proposes a low-cost test method which could inject data-dependent and bounded random jitters into conventional external loop-back testing configuration, and also could test the jitter tracking capability of the data recovery circuit. This method has(More)
This paper presents an active test fixture approach for at-speed functional testing of high-speed I/O interfaces with automated test equipment that is able to reach data rates of 40 Gbps and above. At these data rates signal integrity is critical. Because of this we will not only discuss the solution in terms of its instrumentation but also the challenges(More)
This paper describes a method for analyzing the performance of Automatic Test Equipment (ATE) Device Interface Boards (DIB) for High-Speed Serial Link interface. The procedure requires using only the device under test (DUT) to generate known PRBS TX data and an ATE digitizer to capture the waveform. The information of impulse and frequency response of the(More)
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