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SCNN: An accelerator for compressed-sparse convolutional neural networks

• Angshuman Parashar, Minsoo Rhu, +6 authors William J. Dally
• 2017 ACM/IEEE 44th Annual International Symposium…
• 2017

Convolutional Neural Networks (CNNs) have emerged as a fundamental technology for machine learning. High performance and extreme energy efficiency are critical for deployments of CNNs, especially in… (More)

vDNN: Virtualized deep neural networks for scalable, memory-efficient neural network design

• Minsoo Rhu, Natalia Gimelshein, Jason Clemons, Arslan Zulfiqar, Stephen W. Keckler
• 2016 49th Annual IEEE/ACM International Symposium…
• 2016

The most widely used machine learning frameworks require users to carefully tune their memory usage so that the deep neural network (DNN) fits into the DRAM capacity of a GPU. This restriction… (More)

Priority-based cache allocation in throughput processors

• Dong Li, Minsoo Rhu, +5 authors Stephen W. Redder
• 2015 IEEE 21st International Symposium on High…
• 2015

GPUs employ massive multithreading and fast context switching to provide high throughput and hide memory latency. Multithreading can Increase contention for various system resources, however, that… (More)

The dual-path execution model for efficient GPU control flow

• Minsoo Rhu, Mattan Erez
• 2013 IEEE 19th International Symposium on High…
• 2013

Current graphics processing units (GPUs) utilize the single instruction multiple thread (SIMT) execution model. With SIMT, a group of logical threads executes such that all threads in the group… (More)

A locality-aware memory hierarchy for energy-efficient GPU architectures

• Minsoo Rhu, Michael B. Sullivan, Jingwen Leng, Mattan Erez
• 2013 46th Annual IEEE/ACM International Symposium…
• 2013

As GPU's compute capabilities grow, their memory hierarchy increasingly becomes a bottleneck. Current GPU memory hierarchies use coarse-grained memory accesses to exploit spatial locality, maximize… (More)

CAPRI: Prediction of compaction-adequacy for handling control-divergence in GPGPU architectures

• Minsoo Rhu, Mattan Erez
• 2012 39th Annual International Symposium on…
• 2012

Wide SIMD-based GPUs have evolved into a promising platform for running general purpose workloads. Current programmable GPUs allow even code with irregular control to execute well on their SIMD… (More)

Architecting an Energy-Efficient DRAM System for GPUs

• Niladrish Chatterjee, Mike O'Connor, +4 authors William J. Dally
• 2017 IEEE International Symposium on High…
• 2017

This paper proposes an energy-efficient, high-throughput DRAM architecture for GPUs and throughput processors. In these systems, requests from thousands of concurrent threads compete for a limited… (More)

Maximizing SIMD resource utilization in GPGPUs with SIMD lane permutation

• Minsoo Rhu, Mattan Erez
• ISCA
• 2013

Current GPUs maintain high programmability by abstracting the SIMD nature of the hardware as independent concurrent threads of control with hardware responsible for generating predicate masks to… (More)

GPUVolt: Modeling and characterizing voltage noise in GPU architectures

• Jingwen Leng, Yazhou Zu, Minsoo Rhu, Meeta Sharma Gupta, Vijay Janapa Reddi
• 2014 IEEE/ACM International Symposium on Low…
• 2014

Voltage noise is a major obstacle in improving processor energy efficiency because it necessitates large operating voltage guardbands that increase overall power consumption and limit peak… (More)

CLEAN-ECC: High reliability ECC for adaptive granularity memory system

• Seong-Lyong Gong, Minsoo Rhu, Jungrae Kim, Jinsuk Chung, Mattan Erez
• 2015 48th Annual IEEE/ACM International Symposium…
• 2015

Adaptive-granularity memory architectures have been considered mainly because of main memory bottleneck and power efficiency. Meanwhile, highly reliable protection schemes are getting popular… (More)

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