Minsoo Rhu

Publications36
h-index15
Citations1,404
Highly Influential Citations192
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SCNN: An accelerator for compressed-sparse convolutional neural networks
TLDR
This paper introduces the Sparse CNN (SCNN) accelerator architecture, which improves performance and energy efficiency by exploiting the zero-valued weights that stem from network pruning during training andzero-valued activations that arise from the common ReLU operator. Expand
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vDNN: Virtualized deep neural networks for scalable, memory-efficient neural network design
TLDR
The most widely used machine learning frameworks require users to carefully tune their memory usage so that the deep neural network (DNN) fits into the DRAM capacity of a GPU. Expand
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Compressing DMA Engine: Leveraging Activation Sparsity for Training Deep Neural Networks
TLDR
We introduce a high-performance virtualization strategy based on a "compressing DMA engine" (cDMA) that drastically reduces the size of the data structures that are targeted for CPU-side allocations, improving the performance of virtualized DNNs by an average 53% when evaluated on an NVIDIA Titan Xp. Expand
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Priority-based cache allocation in throughput processors
TLDR
We propose priority-based cache allocation (PCAL) that provides preferential cache capacity to a subset of high-priority threads while simultaneously allowing lower priority threads to execute without contending for the cache. Expand
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A locality-aware memory hierarchy for energy-efficient GPU architectures
TLDR
Our locality-aware memory hierarchy improves GPU performance, energy-efficiency, and memory throughput for a large range of applications with irregular control flow and memory access patterns. Expand
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The dual-path execution model for efficient GPU control flow
  • Minsoo Rhu, M. Erez
  • Computer Science
  • IEEE 19th International Symposium on High…
  • 23 February 2013
TLDR
Dual-path execution can be implemented with only modest changes to current hardware and that parallelism is increased without sacrificing optimal (structured) control-flow reconvergence. Expand
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Architecting an Energy-Efficient DRAM System for GPUs
TLDR
This paper proposes an energy-efficient, high-throughput DRAM architecture for GPUs and throughput processors. Expand
  • 48
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TensorDIMM: A Practical Near-Memory Processing Architecture for Embeddings and Tensor Operations in Deep Learning
TLDR
We present our vertically integrated hardware/software co-design, which includes a custom DIMM module enhanced with near-memory processing cores tailored for DL tensor operations. Expand
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Maximizing SIMD resource utilization in GPGPUs with SIMD lane permutation
TLDR
This paper presents an in-depth analysis on the causes for ineffective compaction. Expand
  • 46
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CAPRI: Prediction of compaction-adequacy for handling control-divergence in GPGPU architectures
  • Minsoo Rhu, M. Erez
  • Computer Science
  • 39th Annual International Symposium on Computer…
  • 9 June 2012
TLDR
This paper proposes a fundamentally new approach to branch compaction that avoids the unnecessary synchronization required by previous techniques and that only stalls threads that are likely to benefit from compaction. Expand
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