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In this paper we present a test structure and design methodology for testing, characterization, and self-repair of TSVs in 3D ICs. The proposed structure can detect the signal degradation through TSVs due to resistive shorts and variations in TSV. For TSVs with moderate signal degradations, the proposed structure reconfigures itself as signal recovery(More)
— In this paper, we present a methodology for characterization and repair of signal degradation in through-silicon-vias (TSVs) in 3-D integrated circuits (ICs). The proposed structure can detect the signal degradation through TSVs due to resistive shorts in liner oxide and variations in resistance of TSV due to weak open and/or bonding resistance. For TSVs(More)
We propose a dynamically reconfigurable SRAM architecture for low-power mobile multimedia applications. Parametric failures due to manufacturing variations limit the opportunities for power saving in SRAM. We show that, using a lower voltage for cells storing low-order bits and a nominal voltage for cells storing higher order bits, ~45% savings in memory(More)
This paper presents a methodology for post-silicon thermal prediction to predict the transient thermal field a multicore package for various workload considering chip-to-chip variations in electrical and thermal properties. We use time-frequency duality to represent thermal system in frequency domain as a low-pass filter augmented with a positive feedback(More)
This paper presents an architectureindependent modeling infrastructure called the Energy Introspector for estimating non-functional aspects of processors such as energy, power, temperature, area, delay, sensor, and reliability. The Energy Introspector supports processor modeling through the integration of various modeling tools. It features structural(More)
ŠDIE-TO-DIE AND WITHIN-DIE statistical variations in process parameters result in parametric failures (read, write, access, and hold failures) in SRAM cells, thereby degrading design yield. The principal reason for parametric failures is intradie variation in the cell transistors' threshold voltage due to random dopant fluctuations (RDFs). 1 On the other(More)
As the supply voltage (V<sub>DD</sub>) approaches the device threshold voltage (V<sub>T</sub>), the elevated temperature results in increased device current. This phenomenon is generally known as Inverse Temperature Dependence (ITD). In this paper, we propose a test structure with a built-in poly-resistor-based heater to characterize ITD in digital(More)
This work proposes a low power methodology for video framebuffers to preserve the perceptual quality while reducing SRAM power. The bank-wise voltage scaling combined with error masking circuitry is proposed where voltage domains are separated according to the importance of luminous and color channels. The implementation may apply to standard embedded(More)