Ming-Yi Tsai

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The technology of through silicon via (TSV) is one of the most promising enablers for 3-D integrated circuit (IC) integration. The embedded TSVs in silicon chips would, however, cause the problem of carrier mobility changes in surrounding devices. There are two objectives in this paper. The first objective is to numerically and experimentally investigate(More)
  • Ming-Yi Tsai, C.S. Lin
  • IEEE Transactions on Electronics Packaging…
  • 2007
In the applications of 3-D packages or stacked die packages, mostly the silicon wafers have to be ground thinner, and then the strengths of the dies from the wafers are needed for assuring good design and reliability of the packages. The purposes of this study are twofold: one is to attempt to develop a new, suitable test method for differentiating the(More)
The light emitting diode (LED) packaging problems associated with high cost, high junction temperature, low luminous efficiency, and low reliability have to be resolved before the LED gaining more market acceptance. In this paper, chip-on-plate (CoP) LED packages with and without phosphors are evaluated in terms of thermal resistance and reliability under(More)
Chinese language has quite different characteristic structures from those of English. There are at least word, character, syllable, Initial-Final levels in Chinese, each carrying different levels of information with complicated correlations among them. In this paper, we investigate the dependency of pronunciation variation in conversational Mandarin speech(More)
Post-application pesticide emissions from wetted leaf surfaces and soil may present a significant pathway of exposure to humans in nearby residential communities. In this study, high volume air sampling was performed to measure airborne concentrations of the pesticide methamidophos in a residential community in close proximity to aerial spraying. Sampling(More)
In this paper, a complete framework for pronunciation modeling process is discussed and analyzed as the integration of three individual but mutual-interactive stages, i.e., the baseform generation, baseform ranking, and baseform pruning stage. The characteristics of different techniques used in each stage and the interaction among them are then well(More)
The aim of this paper was to measure and simulate the warpage of flip-chip PBGA packages subject to thermal loading (from room temperature to 260?C). In the experiments, a full-field shadow moirE? was used to measure real-time out-of-plane deformations (warpages) on the substrate and chip surfaces of the flip-chip packages under thermal heating and cooling(More)
The objective of this study is to experimentally and numerically investigate thermal and residual deformation of plastic ball grid array (PBGA) package and assembly. Shadow moire was used to measure their real-time out-of-plane deformations (warpages) during heating and cooling conditions. A finite element model with material properties characterized by(More)
Thermal/residual deformations and stresses in plastic integrated circuit (IC) packages caused by epoxy molding compound (EMC) during the manufacturing process are investigated experimentally (only for deformations), theoretically, and numerically. A real-time Twyman-Green interferometry is used for measuring the out-of-plane thermal and residual(More)
The purpose of this paper is to investigate the parameters such as thermal loads, adhesive material properties and fillets, bump materials, and moisture, affecting the warpage and bump-joint stresses of the chip-on-glass (COG) packages with anisotropic conductive film (ACF). Two- and three-dimensional finite-element models (FEMs) are employed for(More)