Minal Saxena

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1 Research Scholar of Sagar Institute of Research & Technology, Bhopal, Madhya Pradesh, India 2 Professor, Dept. of Electronics and Communication, Sagar Institute of Research & Technology, Bhopal, Madhya Pradesh, India. __________________________________________________________________________________________ Abstract: Scaling of devices in bulk CMOS(More)
During Multicarrier transmission in OFDM(Orthogonal Frequency Division Multiplexing), the signal suffers due to fading environment and results in timing and frequency errors at the receiver end. An efficient timing and frequency offset estimation algorithm has been designed in VHDL using ISE XILINX 10. 1. The maximum value at which the timing offset is(More)
This paper includes VHDL imlementation of WI max OFDM timing and frequency offset estimation.. It operates in the time domain (before the FFT) and use the repeating pattern of the cycle prefix to gain information about the symbol timing and frequency offset. The timing waveforms analysis show that timing is determined by noticing that the correlation of the(More)
Now these days OFDM is windy used for data communication. OFDM is used for transferring the high data rate. But there are some disadvantages of OFDM one of them is Carrier frequency offset. The cause behind the CFO is the synchronization between frequencies. It is a very sensitive so that hard to manage these frequencies. This paper presents a hybrid(More)
High performance digital adder with less power consumption and reduced area is a fundamental design issues for advanced processors. Carry Select Adder (CSA) is one of the fastest adder used in many processors to perform fast arithmetic function. Many different adder architecture designs have been developed to increase the efficiency of the adder. As we know(More)
Multiple Input Multiple Output (MIMO) systems have recently emerged as a key technology in wireless communication systems for increasing both data rates and system performance. There are many schemes that can be applied to MIMO systems such as space time block codes, space time trellis codes, and the Vertical Bell Labs Space-Time Architecture (VBLAST). This(More)
Speed and area are now a day's one of the fundamental design issues in digital era. To increase speed, while doing the multiplication or addition operations, has always been a basic requirement of designing of advanced system and application. Carry Select Adder (CSA) is a fastest adder used in many processors to accomplish fast arithmetic function. Many(More)
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