Mikhail Popovich

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—Decoupling capacitors are widely used to reduce power supply noise. On-chip decoupling capacitors have traditionally been allocated into the white space available on a die or placed inside the rows in standard cell circuit blocks. The efficacy of on-chip decoupling capacitors depends upon the impedance of the power/ground lines connecting the capacitors to(More)
—Multiple power supply voltages are often used in modern high-performance ICs, such as microprocessors, to decrease power consumption without affecting circuit speed. To maintain the impedance of a power distribution system below a specified level, multiple decoupling capacitors are placed at different levels of the power grid hierarchy. The system of(More)
Multiple supply voltages are often utilized to decrease power dissipation in high performance integrated circuits. On-chip power distribution grids with multiple supply voltages are discussed in this paper. A power distribution grid with multiple supply voltages and multiple grounds is presented. The proposed power delivery scheme reduces power supply(More)
Prolonged noradrenaline administration to rats in steadily increasing dosages for a period of one to four weeks (cumulative doses 25-35 mg/kg) resulted in the development of focal necrotic areas with abundant collagen fibers and marked hypertrophy of cardiomyocytes. Cellular diameter was higher by 37-44% and extracellular space area by 70-100%. A(More)
To decrease power consumption without affecting circuit speed, multiple power supply voltages are often used in modern high performance ICs such as microprocessors. To maintain the impedance of a power distribution system below a specified level, multiple de-coupling capacitors are placed at different levels of the power grid hierarchy. The system of(More)
Reliable design of power distribution network for stacked integrated circuits introduces new challenges i.e., substrate coupling among through silicon vias (TSVs) and tiers grid in addition to reliability issues such as electromigration and thermo-mechanical stress, compared to conventional System on Chip (SoC). In this paper a comprehensive modeling of the(More)
This work proposes reliability aware through silicon via (TSV) planning for the 3D stacked silicon integrated circuits (ICs). The 3D power distribution network is modeled and extracted in frequency domain which includes the impact of skin effect. The worst case power noise of the 3D power delivery networks (PDN) with local TSV failures resulting from(More)
— To decrease power consumption without affecting circuit speed, several power supply voltages are used in modern high performance ICs such as microprocessors. To maintain the impedance of a power distribution system below a specified level, multiple decoupling capacitors are placed at different levels of the power grid hierarchy. The system of decoupling(More)