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Journals and Conferences
In this paper we describe the development and initial testing of a tool for self-assessment of affect while interacting with computer systems: the Sensual Evaluation Instrument. We discuss our research approach within the context of existing affective and HCI theory, and describe stages of evolution of the tool, and initial testing of its effectiveness.
In this paper we describe the development and testing of a tool for self-assessment of affect while interacting with computer systems, meant to be used in many cultures. We discuss our research approach within the context of existing cultural, affective and HCI theory, and describe testing of its effectiveness in the US and Sweden. r 2006 Elsevier Ltd. All… (More)
We review a technology platform that enables monolithic integration of optical and electronic circuits in a mainstream CMOS process and demonstrate a grating coupler with 0.75 dB insertion loss.
During pile driving, static and dynamic soil forces resist pile penetration. Certain soils exhibit significant elastic behavior, causing unfavorable high-rebound which adversely affects pile driveability and complicates its bearing capacity assessment. This paper discusses the types of piles and soil conditions where the negative effects of highrebound on… (More)
This report describes the development of small DNA microarrays of fully defined genes suitable for projects requiring detailed analysis of gene expression in sheep and/or cattle. Two arrays have been developed; the first is a small reference microarray (RIGRA) that has been used to validate experimental design and methodology; the second, a larger array… (More)
We have demonstrated a CMOS Optoelectronic technology platform, using a 650mW 4×10-Gb/s 0.13 μm silicon-on-insulator integrated transceiver chip, co-packaged with an externally modulated laser, to enable high density data interconnects at <$1 per Gbps.
We report on the demonstration of an integrated 4×25 Gb/s parallel optical transceiver built in Luxtera's CMOS photonics platform, and discuss how we can scale this platform to even higher data rates.
We address the effects of packaging on performance, reliability and cost of photonic devices. For silicon photonics we address some specific packaging aspects. Finally we propose an approach for integration of photonics and ASICs.
In this contribution the CMOS photonics technology (LuxG) developed and commercialized by Luxtera is reviewed. The advantages of integration and usage of a standard CMOS foundry toolset/process/practice are discussed with mention to a newly developed 14Gbps transceiver chip.
CMOS integration methodologies, design and performance of advanced silicon photonics ICs are highlighted. The roadmap towards low power and high density optical interconnect as well as close integration with ASICs are addressed.