Michael Raitza

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True random numbers play an important role in the implementation of cryptographic functions and protocols. In case FPGAs are used as implementation platform, true random number generators also must be realized on the FPGA. While such generators have been published, it remains unclear, whether they are safe against external manipulations. Changing the(More)
Using soft-core processors on FPGAs offers the opportunity to customize the system design in order to accelerate the application. While this has always been possible manually by hardware designers, it requires distinct knowledge of design methods and of the microarchitecture of the soft-core. In this paper we show that a mature compiler like the GCC can be(More)
We present MUX based programmable logic circuits built from newly proposed compact and efficient designs of combinational logic gate. These are enabled by reconfigurable Schottky barrier nanowire transistors with multiple independent gates, which can be dynamically switched between p- and n-type functionality. It will be shown that a single device can be(More)
Cryptographic functions are of increasing importance for all kinds of hardware devices. Their strength against attackers not only relies on the particular cryptographic algorithm but also on the quality of the underlying random number generator. Several techniques have been proposed for implementing true random number generators in digital circuits, yet(More)
Random numbers are important ingredients in a number of applications. Especially in a security context, they must be well distributed and unpredictable. We investigate the practical use of random number generators (RNGs) that are built from digital elements found in FPGAs. For this, we implement different types of ring oscillators (ROs) and memory(More)
Future systems based on post-CMOS technologies will be wildly heterogeneous, with properties largely unknown today. This paper presents our design of a new hardware/software stack to address the challenge of preparing software development for such systems. It combines well-understood technologies from different areas, e.g., network-on-chips, capability(More)
Silicon nanowire reconfigurable field effect transistors (SiNW RFETs) abolish the physical separation of n-type and p-type transistors by taking up both roles in a configurable way within a doping-free technology. However, the potential of transistor-level reconfigurability has not been demonstrated in larger circuits, so far. In this paper, we present(More)
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