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In this paper, we describe the design and development effort at Physical Sciences Inc. (PSI) of the Malleable Signal Processor (MSP), a reconfigurable computing engine equipped with five radiation-tolerant Xilinx XQR2V3000 FPGAs slated for the Roadrunner On-Board Processing Experiment (ROPE) imaging payload onboard the AFRL TacSat-2 satellite. TacSat-2,(More)
In most cases authors are permitted to post their version of the article (e.g. in Word or Tex form) to their personal website or institutional repository. Authors requiring further information regarding Elsevier's archiving and manuscript policies are encouraged to visit: a b s t r a c t Next generation backbone networks will likely consist of IP routers as(More)
Next generation backbone networks will likely consist of IP routers as well as optical cross connects and will deploy Generalized Multiprotocol Label Switching (GMPLS) as the control plane protocol. The fiber carries large volume of traffic and therefore one must ensure that adequate mechanisms are in place that facilitate automatically recovery from(More)
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