Michael C. W. Coln

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— The " Split ADC " architecture enables continuous digital background calibration by splitting the die area of a single ADC design into two independent halves, each converting the same input signal. The two independent outputs are averaged to produce the ADC output code. The difference of the two outputs provides information for a background calibration(More)
—The " Split ADC " architecture enables fully digital calibration and correction of nonlinearity errors due to capacitor mismatch in a Successive Approximation (SAR) ADC. The die area of a single ADC design is split into two independent halves, each converting the same input signal. Total area and power is unchanged, resulting in minimal increase in analog(More)
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